VIVEKANANTH GURUMOORTHY
503 Cherry Street,Apt#120 E-mail: gviva_2k@neo.tamu.edu
College Station , TX 77840 E-mail: gviva(dot)2k(at)gmail.com
Website:- http://people.tamu.edu/~gviva_2k Phone: 1-979-587-0240
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OBJECTIVE
To pursue a career in the field of Analog and Mixed Signal Circuit Design which will challenge and utilize my skills effectively.EDUCATION
Master of Science, Electrical Engineering (Analog & Mixed Signals) (Fall 07 - ) GPA: 4/4Texas A&M University, College Station, Texas, USA
Courses: VLSI circuit design (ECEN 474), Circuit Design for Broadband Communication(ECEN 620)
Bachelor of Engineering, Electronics & Communication Engineering,(Fall 03 Fall 07) CGPA: 9.302/10 (ranked 2/150)
College of Engineering, Guindy, Anna University, Chennai, India
Related Courses: CMOS Analog Circuit Design, Design of CMOS RF IC, VLSI design(Digital Integrated Circuits), Computer Architecture, Cellular & Mobile Communication, Digital Signal Processing, Control Systems, Digital Communication, Digital Electronics, Linear Integrated Circuits, Random Processes, Communication theory, Microprocessor programming, Computer Communication Networks, Network analysis & Synthesis.
WORK EXPERIENCE
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Texas Instruments, Chennai, India
Worked as project intern in on OCP Bus Fabric Modeling of DRPs, over a period of 6 months. - Worked on the development and testing of the Bus Electronics board of ANUSAT, Satellite developed indigenously by students in the Integrated Systems Laboratory of Anna University, India.
PROJECTS
Graduate Projects:-
Switched Capacitor Filter design for High Resolution Data Converters (Fall 2007)
Designed a First order Swtiched capacitor filter with UGB > 1 Mhz and DC gain of 0dB, Clock frequency of 20Mhz. Operational Transconductance amplifier was designed with a gain > 100dB , Phase Margin > 48degrees, settling error of 0.01% in integrating period, noise level<50uV, output swing of +/- 0.8V in a supply voltage of +/- 1.5V in 0.6u tech. -
Clock Generator for High Speed Sigma Delta Modulator using PLL (Fall 2007)
Design of on-chip clock generator in 0.35 um process for a Frequency = 200 MHz, Jitter < 1 psec, Load impedance = 2.5 pF, Power supply of +/- 1.35 V.
- Design of Low Drop out Regulator in 0.18um technology. (Spring 2007)
Low drop out regulator to provide a regulated supply voltage of 1.8V providing 50mA load current,line regulation of 1mV/V, load regulation of 0.001%/mA, PSRR of 50dB at 10Khz and 40dB at 100Khz. Settling time and the quiescent current was minimized to the optimal values. The circuit was simulated in 0.18u technology. - Design of Single ended Low noise Amplifier in 0.35um technology. (Spring 2007)
Single ended source degenerated cascoded LNA. Minimum Noise figure was achieved. The circuit was simulated in Tanner TSPICE in 0.18u technology. - Computer Controller buzzer for quiz programs using RF.( Fall 2006)
- Wireless Communication between computers using IR. (Spring 2006)
- Miniature Electronics Elevator Model.( Fall 2005)
- PC Based Waveform Simulator. (Spring 2005)
- Temperature Meter. (Fall 2004)
- Coffee vending Machine. (Spring 2004)
- Variable DC Voltage Power Supply. (Fall 2003)
COMPUTER/TECHNICAL SKILLS
Simulation tools: Cadence, Matlab, Modelsim, OPNET, GlomoSim, CircuitMaker, Visual DSP++Assembly Languages: 8051 in RIDE, 8085, 8086, TMS320C50
Languages: C, C++, Visual Basic, Java, PERL, VHDL, VeriLog
Tools: MS Office(MS Word, MS PowerPoint, MS Excel), Adobe Photoshop, Flash
Web technologies: HTML, CSS, Dreamweaver MX, PHP
HONORS
- Awarded $1000 scholarship by Electrical Engineering Department, TAMU
- Was awarded gold medal for academic excellence during the academic period 2003-04 in college.
- Ranked in top 3 out of 150 students in the undergraduate program.
- Ranked 2nd out of 500,000 students in the pre-college examination.
- Winner of the circuit debugging event at WAVES 06, national level technical symposium held in College of Engineering, Guindy, Anna University.
- Best outgoing student in grade 10 and Pre-college (grade 12).
References:- Provided upon request
WORK AUTHORIZATION: International Student on F1 Visa; Eligible for Practical training from Summer 08